Software Engineer, Machine Learning Compiler, Silicon

Minimum qualifications:

• Bachelor’s degree or equivalent practical experience.
  
• 1 year of experience with software development in C++.
  

Preferred qualifications:

• Master's degree in Computer Science or related technical field.
  
• Experience in optimizing machine learning models for inference.
  
• Experience in compiler development in the context of accelerator-based architectures.
  

About the job

Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

• Work as part of the Edge TPU compiler team, including analyzing and improving the compiler quality and performance on optimization decisions, correctness, and compilation time.
• Develop parallelization and scheduling algorithms to optimize compute and data movement costs to execute ML workloads on the Edge TPU.
• Work with Edge TPU architects to design future accelerators, the hardware/software interface, and co-optimizations of the next generation Edge TPU architectures.
• Work on efficient mapping of generative AI models and other key workloads into Edge TPU instructions through the compiler.
• Closely collaborate with ML model developers, researchers, and Edge TPU hardware/software teams to accelerate the transition from research ideas to user experiences running on the Edge TPU.